Interviewed by Dag Spicer on 2025-08-20 in Mountain View, CA
© Computer History Museum
This interview is with three principal designers and architects of the RISC-V instruction set architecture, Krste Asanović, Yunsup Lee, and Andrew Waterman. This conversation traces the personal and academic backgrounds of the three inventors and the circumstances that led to the creation of RISC-V at UC Berkeley. The three describe how their work in FPGA-based simulation, parallel computing, and vector processor design converged in a shared need for an open, flexible instruction-set architecture free from licensing restrictions. The interview situates RISC-V within the historical lineage of RISC design from Cray, Patterson, and Hennessy, emphasizing its intellectual roots in simplicity and VLSI efficiency. It also explores RISC-V’s adaptability to AI workloads and its growing global influence. The panel concludes that RISC-V’s open, extensible design has become a durable computing standard that is being rapidly and widely adopted in multiple product spaces — from embedded computing to large-scale systems — uniting academic ideals with industrial practice.
- Note: Transcripts represent what was said in the interview. However, to enhance meaning or add clarification, interviewees have the opportunity to modify this text afterward. This may result in discrepancies between the transcript and the video. Please refer to the transcript for further information – http://www.computerhistory.org/collections/catalog/300000133
Visit computerhistory.org/collections/oralhistories/ for more information about the Computer History Museum’s Oral History Collection.
Catalog number: 300000134
Acquisition number: 2025.0120
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