Jim Pappas grew up in Western Massachusetts and attended local public high schools. Inspired initially by relatives in medicine, he originally pursued biology and accounting before joining the United States Air Force in 1975. Serving four years in precision calibration labs, he gained foundational technical experience—including early work on atomic clocks used for GPS testing—which sparked his passion for technology. Upon leaving the service, Pappas earned an electrical engineering degree with an emphasis in computer architecture in three years at the University of Massachusetts Amherst.
Through a recommendation by professor Harold Stone, Pappas interned and subsequently took a full-time position at Digital Equipment Corporation (DEC). Mentored by Ned Forrester, he built hardware emulators for video and graphics chips. Pappas went on to lead hardware engineering for the VT 200 series terminals alongside HT Cho, and developed 3D graphics chips for VAX and Alpha workstations. During a four-year stint building single-chip VAX CPUs, Pappas realized he had lost touch with the broader industry, prompting him to pivot toward industrywide interconnect standards. Collaborating with Intel, he helped rebrand and launch the Peripheral Component Interconnect (PCI) standard.
Joining Intel in 1994, Pappas spearheaded the development and deployment of Universal Serial Bus (USB) 1.0 to resolve PC cable complexity. By maintaining tight focus with a small consortium of key partners and tailoring features to anchor products (such as the Microsoft Mouse), USB achieved global ubiquity.
Following the success of USB, Pat Gelsinger recruited Pappas to oversee top technology initiatives across Intel’s desktop and data center divisions. Over his career, Pappas led or contributed to 77 major industry initiatives. Key efforts included:
USB 2.0: Driven by strict focus on digital imaging, storage, and communication.
NVMe & PCIe Interoperability: Partnering with leaders like Amber Huffman to bring PlugFests, ecosystem standards, and solid-state drive (SSD) adoption to mainstream platforms.
Compute Express Link (CXL): Serving as chair to unify competing memory architectures (CAPI, Gen-Z, CCIX) under a single open standard.
Universal Chiplet Interconnect Express (UCIe) & UALink: Establishing foundational open interconnect standards critical to modern AI architectures, chiplet integration, and pooled memory fabrics.
Throughout the interview, Pappas emphasizes leadership strategies for driving successful standards: keeping working groups small and focused, avoiding feature bloat, and embracing "creative insubordination". He attributes his career success to operating without fear of failure or termination, enabling decisive engineering and strategic risk-taking. Fully retired in Tumwater, Washington, Pappas reflects on his contribution to the memory and interconnect foundations powering today’s computing and AI landscapes.
Interviewed by Tom Coughlin on 2025-10-27
© Computer History Museum
Note: Transcripts represent what was said in the interview. However, to enhance meaning or add clarification, interviewees have the opportunity to modify this text afterward. This may result in discrepancies between the transcript and the video. Please refer to the transcript for further information – http://www.computerhistory.org/collections/catalog/300000223
Catalog number: 300000224
Acquisition number: 2025.0183
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